1. Field of the Invention
The present invention relates to an oscillation device including a crystal oscillation circuit, and more particularly, to a constant voltage circuit configured to detect a leakage current when a power supply voltage is low to enable a stable voltage output at a power supply voltage level.
2. Description of the Related Art
FIG. 5 is a block diagram of a related-art oscillation device 100 that is widely used in a clock, electronic equipment, and the like. The related-art oscillation device 100 includes a constant voltage circuit 10 configured to generate a constant output voltage VREG from an input voltage, and a crystal oscillation circuit 20 configured to oscillate a crystal unit XTAL with the generated constant voltage VREG. Note that, in the oscillation device 100, a ground potential is denoted as VDD and a power supply voltage is denoted as VSS.
In the oscillation device 100, in order to reduce a current consumption, it is important to reduce a voltage for driving the crystal oscillation circuit 20 as much as possible. Therefore, the constant voltage circuit 10 is formed so as to output a predetermined constant voltage VREG even when the power supply voltage is equal to or higher than a predetermined voltage. On the other hand, the crystal oscillation circuit 20 has an oscillation stop voltage VDOS that is determined by oscillation characteristics of the crystal unit XTAL, an oscillation inverter, a load capacitance, and the like. Therefore, in the constant voltage circuit 10, it is necessary that an absolute value |VREG| of the constant voltage VREG be larger than an absolute value |VDOS| of the oscillation stop voltage VDOS.
FIG. 6 is a circuit diagram for illustrating the constant voltage circuit 10 of the related-art oscillation device 100. The constant voltage circuit 10 includes a reference voltage circuit 101, a differential amplifier circuit 102, and an output circuit 103.
In the reference voltage circuit 101, a constant current IREF flows to a PMOS transistor MP1 from a depletion type NMOS transistor MD1 as a constant current source to generate a reference voltage VREF. In the differential amplifier circuit 102, the reference voltage VREF is input to an inverting input terminal, and a feedback voltage FB is input to a non-inverting input terminal. The differential amplifier circuit 102 controls a gate voltage of an output transistor MN5 connected to an output terminal NO2 so that the reference voltage VREF and the feedback voltage FB are equal to each other. Therefore, the absolute value |VREG| of the constant voltage output of the constant voltage circuit 10 is a sum of an absolute value |VREF| of the reference voltage and a gate-source voltage Vgs of an NMOS transistor MN6.
When the power supply voltage is low, a voltage at the ground potential VDD level is applied to a gate of the output transistor MN5, and thus, the output voltage VREG of the related-art constant voltage circuit 10 is equal to the power supply voltage VSS (see, for example, Japanese Patent Application Laid-open No. 2001-312320).
However, when a threshold voltage of the MOS transistor is lower than a predetermined value due to a high temperature, manufacture variations, and the like, and when a leakage current of the MOS transistor increases, a drain-source voltage Vds of the PMOS transistor MP1 becomes lower, and a gate-source voltage Vgs of a PMOS transistor MP3 cannot be secured. Further, when the ground potential VDD cannot be sufficiently applied to a gate of an output transistor MN5, or, when the ground potential VDD cannot be sufficiently applied to the gate of the output transistor MN5 due to a leakage current through an NMOS transistor MN3, a gate-source voltage Vgs of the output transistor MN5 cannot be secured and the output transistor MN5 is turned off. It follows that the relationship between the absolute value |VREG| of the constant voltage and an absolute value |VSS| of the power supply voltage is not |VREG|=|VSS| but |VREG|<|VSS|. When |VREG| is smaller than an absolute value |VDOS| of an oscillation stop voltage, the crystal oscillation circuit 20 cannot operate.